Each design file in GM VHDL defines a library. The library name is the base name of the design file. When a design file is compiled, the library is created with the .o extension. In order to use something from a library in another design file, the library and use statements are used. The library statement simply lists the names of the libraries that will be used by the following design. The use statement specifies what parts of the library will be used. The library and use statements do not make the library components available throughout the file, but only to the following design.
The syntax for the use and library statements is:
If the suffix of the selected name in the use clause denotes a declared object, then that object will be made available. If the suffix of the selected name is the reserved word ALL, then the prefix should denote a package or library and everything in that package or library is made available. For example, the vector library contains the package named functions would make everything in that package available for use. The statement would just make the to_bit function available for use. If a library unit named parts contains any entities and architectures that are used for components, then would make every entity and architecture of the parts library available.