COURSE:         CSCI 355
EXAM:           Midterm Fall '17 
INSTRUCTOR:     Dr. P. Walsh
DURATION:       70 minutes
INSTRUCTIONS    This exam consists of 5 questions. Answer all questions
in the book provided (max 50 points). This is a closed-book no-notes
exam. All questions relate to material covered in-class or in the lab. All
conventions discussed in-class must be followed.

Question 1 (10 points):
-----------------------

Consider the construction of a 4 data-bits (d1,d2,d3,d4) and 4 check-bits
(p1,p2,p3,p4) Extended Hamming code. Let the Hamming encoded word have
the form (p1,p2,d1,p3,d2,d3,d4,p4). Also, let the received parity bits
be the syndrome (c1,c2,c3) and c4.

(a) If the data bits (d1,d2,d3,d4) are (1,0,1,0), what is the Hamming
encoded word?
(b) What can you infer if the the syndrome is (0,0,0) and c4 is (1).

Question 2 (10 points):
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Consider the function F(a,b,c,d,e) = 
Sigma m (0,1,4,5,8,16,17,20,21,24,28)

(a) Develop a minimized SOP expression for F.
(b) Develop a minimized POS expression for F.
(c) Develop a fully-complemented CMOS realization for F.

Question 3 (10 points):
-----------------------

Consider the function F(a,b,c,d,e) = 
Sigma m (0,1,2,3,10,11,14,15,24,25,27,29,30,31)
   
(a) Implement F using  the minimum number of 4-to-1 multiplexors.  You are
to assume that the inputs are available in their true and complemented
form and the multiplexor producing the output will have control lines
assigned to a and b.

(b) Implement F using  the minimum number of 2-to-1 multiplexors.  You are
to assume that the inputs are available in their true and complemented
form and the multiplexor producing the output will have its control line
assigned to a.

Question 4 (10 points):
-----------------------

Consider the function F(a,b,c,d,e) = ab + cd'e + a'de + abcde
(a) Draw a NOR-NOR realization of F based on its structural description.
(b) Draw a NAND-NAND realization of F based on its structural description.
(c) Express F in  canonical POS form using Pi M notation.
(d) Express F in  canonical SOP form using Sigma m notation.
(e) Implement F' (complement of F)  using a NOR-NOR PLA 
(PLA logic diagram only, you are not required to show the switch-level
circuit with transistors).

Question 5 (10 points):
-----------------------

(a) Draw the logic schematic for a SR latch using
   (1) NOR gates
   (2) NAND gates.
(b) Derive the characteristic equation for the gated SR latch.
(c) SR latch inputs S=1 and R=1 are not allowed. Why?
(d) JK latches are not useful. Why?